BJT Amplifier Configurations

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Description

1 Objectives

The purpose of the lab is to examine the properties of the BJT amplifier configurations and investigate their small- signal performance, with the emphasis on the design of BJT amplifiers.

2 Introduction

2.1 Superposition Theorem Linear and Nonlinear Circuit Solution

The superposition theorem states that in a linear circuit with multiple sources, any branch current or node voltage is the sum of the currents or voltages produced by each source applied individually. Linear components include resistors, capacitors, inductors, and controlled sources, therefore any combination of these elements yield a linear circuit. Figure 1 shows the application of superposition theorem to solve linear circuits, where the DC and AC solutions are obtained by applying only DC and AC sources, respectively, providing the total solution as Vo = Vo ,dc + Vo ,ac .

(Information missing but the answer if full)

Figure 1: Application of the superposition theorem to linear circuits

Thesuperpositiontheoremcanbeextendedtosolvenonlinearcircuits undercertain restrictions,which areknown assmall-signalconditions.TheDCsolutionusuallyrequires using simplifiedDCmodelsforthenonlineardevices (such asusing theconstant-voltage-dropmodel foradiode orabase-emitterjunction,insteadoftheexponential model), and canbeobtainedbyapplyingonlyDCsources. ACsmall-signalmodel parametersaredependenton the DCsolution,aswell asother device parameters. Once the linearizedcircuit using ACsmall-signalmodels isconstructed,ACsolutioncanbeobtainedbyapplyingonly ACsources. Figure 2illustratesextensionofthe superpositiontheoremtononlinearcircuits, wheretheapproximatesolutionisVo Vo ,dc + Vo ,ac .

Figure 2: Extension of the superposition theorem to nonlinear circuits

2.2 BJT Small-Signal AC models

BJTsarenonlineardevices,wherethecollectorcurrentisanexponentialfunctionofthebase-emittervoltage. Typical BJTamplifiersincludeDCsources providingthe DCbias, aswell asACsources asthe signals tobeamplified. Extensionofsuperposition toBJTamplifiersrequiresfindingtheDCsolutionfirst,wheretheBJTsmust bebiased intheactive region. Figure 3 shows the AC small-signal models for NPN and PNP BJTs in the active region.

c Department of Electrical and Computer Engineering, Texas A&M University

Figure 3: Small-signal AC models for NPN and PNP BJTs

Small-signal parameters in Fig. 3 can be calculated as

where IC and IE are DC collector and emitter currents, respectively, VT is the thermal voltage (approximately 25mV at room temperature), β is the current gain of the transistor (around 100 or larger), and VA is the Early Voltage (around 100V). For typical discrete BJT circuit implementations, ro will not have a significant impact, therefore will be ignored. For small-signal AC analysis, π-model and T-model provide identical results, however the T-model allows more intuitive analysis with simpler calculations. Table 1 shows node impedances and node-to-node gains for generic BJT configurations, which are derived by substituting the transistor with its T-model, where ro = .

Table1:BJTNode ImpedancesandNode-to-NodeGainswhen ro =

2.3 BJT Amplifier Configurations

2.3.1 Common-Emitter Configuration

Figures 4and 5show the common-emitterconfigurationsforNPN and PNP BJTs,respectively. Analysisofthis configurationyields

RB 2

VRE

R

DC : VRB 2

B 1

+ RB 2

VCC VRE = VRB 2 0.7 IE =

R

E

IC (2)

V

Vo ,ac

RC

(3)

AC : Av =

i

re

)

+ (RE

k RG

Ri = RB 1 k RB 2 k + 1)(re + (RE k RG )) Ro = RC

VCC

RB1 RC

Vo

RB1

VCC

VRC

RC

Vo,dc

RC

Ri Vo,ac

Ro

Vi

RB2 RE RG

RB2

VRB2

VRE RE

Vi RB

RE ||RG

(a) (b) (c)

Figure 4: (a) NPN Common-Emitter Configuration (b) DC equivalent (c) AC equivalent

VCC

VCC

RB2 RE RG

Vi Vo

RB2

VRB2

VRE

RE

Ri

Vo,dc Vi

RE ||RG

Ro

RB Vo,ac

RB1 RC

RB1

VRC RC RC

(a) (b) (c)

Figure 5: (a) PNP Common-Emitter Configuration (b) DC equivalent (c) AC equivalent

Typicaldesignspecificationsforthecommon-emitterconfigurationincludes:

• 0-to-peak unclipped output voltage swing: Vˆo

V

Vo ,ac

Voltage gain: Av =

i

• Input and output resistances: Ri and Ro

• THD at the maximum output level

• Sensitivity to β and |VBE | variations

Based on the typical specifications, design procedure for the common-emitter amplifier in Figs. 4 and 5 can be given as follows:

➭ Choose VRE 1V to have less than 10% variation of IC when VBE = 0.7 ± 0.1.

➭ To have an unclipped output swing of Vˆo , VRC should be chosen such that (VCC Vˆo VRE 0.2) VRC Vˆo .

Choice of VRC does not only affect the available signal swing at the output, but also determines the available

gain as well as the linearity of the amplifier as follows:

r

RC VRC /IC

VRC

VRC ,max

VCC Vˆo VRE 0.2

RG = 0 |Av | =

e

= =

VT /IC VT

|Av |max = =

V

V

T T

✰ Small-signal condition: vˆbe =

Vˆo

VRC

VT VT Vˆo VRC

Tomaximizetheavailablegainandlinearity,chooseVRC = VRC ,max = VCC Vˆo VRE 0.2

Note that VCE ,sat 0.2V is an approximation, you may increase it up to 0.5V to avoid clipping in case operat-

ing point shifts due to resistor tolerances.

Choose IC such that

β

IC

R

i

N

+

VRE + 0.7

1

N

+

VCC VRE 0.7

IRB 1

|A v |

VRC

I

where Ri is the minimum input resistance specified, and N

B

≥ 10 for β-insensitive design.

Note that as long as VRC and VRE are kept the same, choice of IC does not change the output swing or the

available gain, but affects the input and output resistances, as well as the resistor values in the amplifier.

➭ Find the resistor values

RC =

VRC

IC

RE =

VRE

IC

RG

RC

|Av |

− re RB 1 =

β(VCC VRE 0.7)

NIC

RB 2 =

β(VRE + 0.7)

NIC

➭ Simulate the circuit for the final adjustment of RG .

2.3.2 Common-Collector Configuration

Figures 6 and 7 show the common-collector configurations for NPN and PNP BJTs, respectively. Also known as the emitter-follower, analysis of this configuration yields

RB 2

VRE

R

DC : VRB 2

B 1

+ RB 2

VCC VRE = VRB 2 0.7 IE =

R

E

IC (4)

Vo ,ac

RE

AC : Av =

=

Vi re

VCC

+ RE

Ri = RB 1 k RB 2 k + 1)(re + RE ) Ro = RE k re (5)

VCC

RB1

Vi Vo

RB1

Ri

Vo,dc Vi

Ro

RB Vo,ac

RB2 RE

RB2

VRB2

VRE RE RE

(a) (b) (c)

Figure 6: (a) NPN Common-Collector (Emitter-Follower) Configuration (b) DC equivalent (c) AC equivalent

VCC

RB2 RE

Vo

RB2

VCC

VRB2 VRE

RE

Vo,dc Ri

RE

Vo,ac

Vi RB1

RB1

Ro

Vi RB

(a) (b) (c)

Figure 7: (a) PNP Common-Collector (Emitter-Follower) Configuration (b) DC equivalent (c) AC equivalent

In typical multi-stage amplifiers, emitter follower is directly connected to a gain stage, such as a common-emitter amplifier, without the extra biasing resistors RB 1 and RB 2 . Therefore, DC voltage levels in an emitter follower is typically dependent on the previous amplifier stage.

2.3.3 Common-Base Configuration

Figures 8 and 9 show the common-base configurations for NPN and PNP BJTs, respectively. Analysis of this con- figuration yields

RB 2

VRE

DC : VRB 2

R

B 1

+ RB 2

VCC VRE = VRB 2 0.7 IE =

E

IC (6)

AC : Av =

Vo ,ac

Vi

= RC

re

Ri = RE k re Ro = RC (7)

VCC

RB1 RC

Vo

RB1

VCC

VRC

RC

Vo,dc

R

RC Ro

Vo,ac

Ri

RB2 RE Vi

RB2 VRB2

VRE RE

RE Vi

(a) (b) (c)

Figure 8: (a) NPN Common-Base Configuration (b) DC equivalent (c) AC equivalent

VCC

VCC

RB2 RE

Vi

Vo

RB1 RC

RB2

RB1

VRB2

VRE

VRC

RE

Vo,dc

RC

RE Ri

Ro Vi

Vo,ac

RC

(a) (b) (c)

Figure 9: (a) PNP Common-Base Configuration (b) DC equivalent (c) AC equivalent

Common-base stages are typically used in cascode or folded-cascode amplifiers, where a common-base stage is directly following a common-emitter amplifier.

3 Calculations

1. Design the common-emitter amplifier in Fig. 4(a) with the following specifications:

Supply Voltage, VCC

5V

0-to-Peak Output Swing, Vˆo

≥ 1V

Voltage Gain, |Av |

25

Input Resistance, Ri

≥ 2k Ω

Output Resistance, Ro

≤ 1.8k Ω

THD for 5kHz 1V (0-to-peak) Sine Wave Output Voltage, Vo

≤ 4%

Relative Variation of IC for VBE = 0.7 ± 0.1V

≤ 10%

Transistor’sCurrentGain,β

≥ 100

Show your design procedure and all your calculations. Your design should be insensitive to β variations.

2. Using the same RB 1 , RB 2 and RE values from your common-emitter amplifier, calculate Av , Ri and Ro for the emitter follower in Fig. 6.

3. Using the same RB 1 , RB 2 , RC and RE values from your common-emitter amplifier, calculate Av , Ri and Ro for the common-base amplifier in Fig. 8.

4 Simulations

For all simulations, provide screenshots showing the schematics and the plots with the simulated values prop- erly labeled.

1. Draw the common-emitter amplifier schematics in Figs. 4(a) and 5(a) using the calculated component values and 2N3904 and 2N3906 transistors. For both circuits,

(a) Perform DC operating point or interactive simulation to obtain the DC solution for VRB 2 , VRE , VRC ,

Vo ,dc and IC .

(b) Perform AC simulation to obtain Av , Ri and Ro .

(c) Apply a 5kHz 40mV sine wave signal to the input Vi and obtain the time-domain waveforms for the input and output voltages using transient simulation. Perform Fourier simulation to measure the total harmonic distortion (THD) on the output waveform.

(d) Increase the input amplitude to measure the clipping levels at the output voltage Vo .

2. Draw the emitter-follower schematics in Figs. 6(a) and 7(a) using the calculated component values and 2N3904 and 2N3906 transistors. For both circuits,

(a) Perform DC operating point or interactive simulation to obtain the DC solution for VRB 2 , VRE and IC .

(b) Perform AC simulation to obtain Av , Ri and Ro .

(c) Apply a 5kHz 0.8V sine wave signal to the input Vi and obtain the time-domain waveforms for the input and output voltages using transient simulation. Perform Fourier simulation to measure the total harmonic distortion (THD) on the output waveform.

3. Draw the common-base amplifier schematics in Figs. 8(a) and 9(a) using the calculated component values and

2N3904 and 2N3906 transistors. For both circuits,

(a) Perform DC operating point or interactive simulation to obtain the DC solution for VRB 2 , VRE , VRC ,

Vo ,dc and IC .

(b) Perform AC simulation to obtain Av , Ri and Ro .

(c) Apply a 5kHz 8mV sine wave signal to the input Vi and obtain the time-domain waveforms for the input and output voltages using transient simulation. Perform Fourier simulation to measure the total harmonic distortion (THD) on the output waveform.

5 Measurements

For all measurements, provide screenshots showing the plots with the measured values properly labeled.

1. Build the common-emitter amplifiers in Figs. 4(a) and 5(a) using the simulated component values and 2N3904 and 2N3906 transistors. For both circuits,

(a) Measure the DC values for VRB 2 , VRE , VRC , Vo ,dc and IC using the voltmeter or scope.

(b) Measure Av , Ri and Ro using the network analyzer.

(c) Apply a 5kHz 40mV sine wave signal to the input Vi and obtain the time-domain waveforms for the input and output voltages using the scope. Measure the total harmonic distortion (THD) on the output waveform using the spectrum analyzer.

(d) Increase the input amplitude to measure the clipping levels at the output voltage Vo using the scope.

2. Build the emitter-follower circuits in Figs. 6(a) and 7(a) using the simulated component values and 2N3904 and 2N3906 transistors. For both circuits,

(a) Measure the DC values for VRB 2 , VRE and IC using the voltmeter or scope.

(b) Measure Av , Ri and Ro using the network analyzer.

(c) Apply a 5kHz 0.8V sine wave signal to the input Vi and obtain the time-domain waveforms for the input and output voltages using the scope. Measure the total harmonic distortion (THD) on the output waveform using the spectrum analyzer.

3. Build the common-base amplifiers in Figs. 8(a) and 9(a) using the simulated component values and 2N3904 and 2N3906 transistors. For both circuits,

(a) Measure the DC values for VRB 2 , VRE , VRC , Vo ,dc and IC using the voltmeter or scope.

(b) Measure Av , Ri and Ro using the network analyzer.

(c) Apply a 5kHz 8mV sine wave signal to the input Vi and obtain the time-domain waveforms for the input and output voltages using the scope. Measure the total harmonic distortion (THD) on the output waveform using the spectrum analyzer.

6 Report

1. Include calculations, schematics, simulation plots, and measurement plots.

2. Prepare a table showing calculated, simulated and measured results.

3. Compare the results and comment on the differences.

7 Demonstration

1. Build the common-emitter amplifier circuits in Figs. 4(a) and 5(a) on your breadboard and bring it to your lab session. Be prepared to convert these two circuits into emitter followers in Figs. 6(a) and 7(a), and common- base amplifiers in Figs. 8(a) and 9(a).

2. Your name and UIN must be written on the side of your breadboard.

3. Submit your report to your TA at the beginning of your lab session.

4. For the common-emitter amplifiers in Figs. 4(a) and 5(a):

• Measure Av , Ri , and Ro using the network analyzer.

• Apply a 5kHz 40mV sine wave input and show the time-domain output voltage using the scope.

• With the 5kHz 40mV sine wave input, measure the THD at the output using the spectrum analyzer.

5. Convert Figs. 4(a) and 5(a) to Figs. 6(a) and 7(a) by short-circuiting RC with a wire and removing the bypass capacitor at the emitter, then

• Apply a 5kHz 0.8V sine wave input and show the time-domain waveforms at the input and the output using the scope.

6. Remove the wire short-circuiting RC , add the bypass capacitor back to the emitter, remove RG , and AC-ground the base through the capacitor to obtain the common-base amplifiers in Figs. 8(a) and 9(a), then

• Apply a 5kHz 8mV sine wave input and show the time-domain waveforms at the input and the output using the scope.