$35.00
Description
1 Objectives
The purpose of this experiment is to design a multistage BJT amplifier based on a list of specifications.
2 Introduction
Design of an amplifier typically requires multiples of stages to satisfy all specifications, so a systemlevel evaluation of the requirements is necessary to determine how many and what type of stages will be needed. Based on the gain and output swing requirements, the number of gain stages can be estimated. Depending on the load resistor, adding a buffer may become necessary to preserve the gain. If performed accurately, the initial assessment may be sufficient to determine the overall topology, but it usually takes a few iterations to complete the design.
Figure 1shows twoversionsoftwostageamplifierscomposedofagainstageand abuffer. AssumingR_{i} _{2} R_{C} , the maximum available gain for these circuits can be determined as V_{RC} /V_{T} when R_{G} is zero. The gain can always be reduced by increasing R_{G} , but cannot be increased beyond A_{v} _{,max } = V_{RC} _{,max} /V_{T} , where V_{RC} _{,max } = V_{CC} − V_{RE} − V^{ˆ}_{o} − V_{CE} _{,sat} . Therefore, if the gain specification is higher than A_{v} _{,max} , an extra gain stage is needed. The buffer stage is usually necessary when the load resistor is small, i.e., a few hundreds of ohms or smaller. Driving such a low resistance directly from the amplifier stage significantly reduces the gain or requires a gain stage with a very
high power dissipation.
^{R}_{B2}
^{R}_{i}
_{V}_{i}
^{V}RE
^{I}RB1
^{V}CC
R_{E } R_{G}
^{Q}_{1 } Q_{2}
R_{i2}
_{I}
_{L}
_{R}_{B1}
^{R}_{i}
_{o}
_{V}
_{V}
_{i}
^{V}RC
^{I}RB1
^{V}CC
R_{C}
Q_{1}
R_{H}
_{I}
_{L}
^{R}_{i2 } ^{V}^{o}
Q_{2 } R_{L}
^{R}_{B1}
^{V}RC R_{C } R_{H } R_{L}
R_{B2}
^{V}RE R_{E } R_{G}
Figure1:TwostageBJTamplifier
Assuming that one gain stage followed by a buffer is sufficient for the design requirements, the circuits in Fig. 1 can be used as a starting point. Typical specifications include, but not limited to:
• 0topeak output swing: V^{ˆ}_{o}
• Gain: A_{v} = A_{v} _{1} A_{v} _{2} (where A_{v} _{1} is the amplifier gain and A_{v} _{2} is the buffer gain)
• Input resistance: R_{i}
• Load resistance: R_{L}
• Linearity: vˆ_{b}_{e} _{1} V_{T}
• βinsensitivity: I_{RB} _{1} I_{B} _{1} , I_{C} _{1} I_{B} _{2}
• V_{BE} insensitivity: V_{RE} 0.1V
Using one of the circuits in Fig. 1, the design procedure can be given as follows:
➭ Assume A_{v} _{2 } ≈ 1 and R_{i} _{2} R_{C} , which is necessary to make the overall gain insensitive to β, as R_{i} _{2} is directly dependent on β.
➭ Choose V_{RE} 0.1V , which requires V_{RE } ≥ 1V . Smaller values of V_{RE }cause the DC biasing to be sensitive to variations of V_{BE} , whereas larger values decrease the available output swing.
c Department of Electrical and Computer Engineering, Texas A&M University
➭ Since the buffer gain A_{v} _{2} is assumed to be close to unity, the AC signal magnitudes at the output, at the emitter of Q_{2} , and at the collector of Q_{1} will be similar, where the main difference among these voltages will be their DC levels. To avoid voltage clipping, V_{RC} should be chosen such that
^{V}CC ^{−} ^{V}^{ˆ}o ^{−} ^{V}RE ^{−} ^{}^{V}CE ,sat ^{} ^{≥} ^{V}RC ^{≥} ^{V}^{ˆ}o
Tomaximizetheavailablegainandlinearity,V_{RC} should be maximized, however the value of V_{CE} _{,sat}  can be chosen slightly larger (0.3 to 0.5V) than the typical value of 0.2V to account for variations in the circuit, as well as the small AC signal content at V_{RE} .
➭ The output voltage is a sine wave with the amplitude V^{ˆ}_{o} , therefore the maximum value of I_{L } in Fig. 1 is V^{ˆ}_{o} /R_{L} . When I_{L} reaches its maximum level, the voltage drop on R_{H} reaches its minimum. Since I_{E} _{2} is always a positive current (leaving the emitter for NPN, or entering the emitter for PNP), the current on R_{H} must always be larger than I_{L} to avoid current clipping. Therefore, R_{H} should be chosen such that
_{V}_{RC} _{−} _{0.7} _{−} _{V}^{ˆ}_{o}
_{V}^{ˆ}_{o}
Once R_{H} is chosen, I_{C} _{2} can be determined from
R_{H } ^{≥} R_{L}
_{V}_{RC} _{−} _{0.7}
R
^{I}_{C} _{2} ^{=}
H
➭ The maximum value of I_{C} _{1} is determined by the input resistance requirement, whereas the minimum value of I_{C} _{1} depends on I_{B} _{2} , since for βinsensitive design I_{C} _{1} I_{B} _{2} is required. Therefore, I_{C} _{1} should be chosen such that
_{N} ^{I}^{C} ^{2}
^{β}
_{β}
R
^{≤} ^{I}_{C} _{1} ^{≤}
i
^{1}
+ +
N N A_{v} 
where N ≥ 10.
➭ Calculate the resistor values:
V_{RE} + 0.7
V_{CC} − V_{RE} − 0.7
^{V}RC
R_{C } =
^{V}RC
^{I}C 1
, R_{E } =
^{V}RE
^{I}C 1
, R_{G } ≈
^{R}C
A_{v} 
− r_{e} _{1} , R_{B} _{1} =
β(V_{CC } − V_{RE} − 0.7)
NI_{C} _{1}
, R_{B} _{2} =
β(V_{RE } + 0.7)
NI_{C} _{1}
➭ Calculate A_{v} _{2} =
R_{H} k R_{L}
r_{e} _{2} + (R_{H } k R_{L} )
and R_{i} _{2} = (β + 1)(r_{e} _{2} + (R_{H } k R_{L} )) to verify the initial assumptions.
➭ Further adjustments can be done after simulation. R_{B} _{1} and R_{B} _{2} can be readjusted for DC biasing, whereas R_{G }can be used to finetune A_{v} and R_{i} . R_{H } may also be modified (typically decreased) in case of current clipping at the buffer.
3 Calculations
Design a BJT amplifier based on the specifications provided in the table below. Your design should be insensitive to β variations, and both the input and the output should be AC coupled as in Fig. 1.

^{Supply} ^{V}^{oltage,} ^{V}_{CC}
5V
^{Load} ^{Resistance,} ^{R}_{L}
100Ω
Transistor’sCurrentGain,β
≥ 100
^{Relative} ^{V}^{ariation} ^{of} ^{I}_{C } ^{for} ^{V}_{BE } ^{=} ^{0.7} ^{±} ^{0.1V}
≤ 10%
^{0toPeak } ^{Output} ^{Swing,} ^{V}^{ˆ}_{o}
≥ 1V
^{V}^{oltage} ^{Gain,} ^{}^{A}_{v} ^{}
20
^{Input} ^{Resistance,} ^{R}_{i}
≥ 1k Ω
^{THD} ^{for} ^{5kHz} ^{1V} ^{(0topeak)} ^{Sine} ^{W}^{ave} ^{Output} ^{V}^{oltage,} ^{V}_{o}
≤ 5%
4 Simulations
For all simulations, provide screenshots showing the schematics and the plots with the simulated values prop erly labeled.
1. Draw the schematics of the amplifier you designed, and obtain the DC solution for all node voltages and branch currents using DC operating point or interactive simulation. Adjust your component values if the results are significantly different from your calculations.
2. Obtain A_{v} and R_{i} using AC simulation. If necessary, adjust the resistor values to satisfy the specifications.
3. Apply a 5kHz 50mV sinewave input and obtain the timedomain waveforms at the input and the output using transient simulation. If your output voltage is clipped or significantly distorted, adjust your design values until you have unclipped 1V (0topeak) output signal, while keeping A_{v} and R_{i} requirements satisfied.
4. With the 5kHz 50mV sinewave input, obtain the total harmonic distortion (THD) on the output waveform using Fourier simulation.
5 Measurements
For all measurements, provide screenshots showing the plots with the measured values properly labeled.
1. Build your amplifier using the simulated component values, and measure DC voltages at all nodes using the
voltmeter or scope.
2. Measure A_{v} and R_{i} using the network analyzer. If necessary, adjust the resistor values to satisfy the specifica tions.
3. Apply a 5kHz 50mV sinewave input and obtain the timedomain waveforms at the input and the output using the scope. If your output voltage is clipped or significantly distorted, adjust your design values until you have unclipped 1V (0topeak) output signal, while keeping A_{v} and R_{i} requirements satisfied.
4. Apply a 5kHz 50mV sinewave input and obtain the total harmonic distortion (THD) on the output waveform using the spectrum analyzer.
6 Report
1. Include calculations, schematics, simulation plots, and measurement plots.
2. Prepare a table showing calculated, simulated and measured results.
3. Compare the results and comment on the differences.
7 Demonstration
1. Build the twostage amplifier you designed on your breadboard and bring it to your lab session.
2. Your name and UIN must be written on the side of your breadboard.
3. Submit your report to your TA at the beginning of your lab session.
4. Measure A_{v} and R_{i} of the amplifier using the network analyzer.
5. Apply a 5kHz 50mV sine wave input and show the timedomain output voltage using the scope.
6. With the 5kHz 50mV sine wave input, measure the THD at the output using the spectrum analyzer.